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@ -173,7 +173,7 @@ destination = destination & source
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destination = destination | source
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```
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### SHL (Shift Logical Left)
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### SHL
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#### Details
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| mnemonic | opcode | operands | carry | zero | sign | overflow | break |
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| -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
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@ -181,7 +181,7 @@ destination = destination | source
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| | | `count` : `reg` / `mem` / `imm` |
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#### Description
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`SHL` shifts the bits of the destination operand upward (toward the
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`SHL` (Shift Logical Left) shifts the bits of the destination operand upward (toward the
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most significant bit) by the number of bit positions specified in
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the second operand (`count`). As bits are transferred out of the
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left (high-order) end of the destination, zero bits are shifted
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@ -194,7 +194,7 @@ The carry flag (CF) is set equal to the last bit shifted out of the left end.
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destination = destination << count
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```
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### SHR (Shift Logical Right)
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### SHR
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#### Details
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| mnemonic | opcode | operands | carry | zero | sign | overflow | break |
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| -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
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@ -202,9 +202,9 @@ destination = destination << count
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| | | `count` : `reg` / `mem` / `imm` |
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#### Description
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SHR shifts the bits of the destination operand downward (toward
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`SHR` (Shift Logical Right) shifts the bits of the destination operand downward (toward
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the least significant bit) by the number of bit positions
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specified in the second operand (count). As bits are transferred
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specified in the second operand (`count`). As bits are transferred
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out of the right (low-order) end of the destination, zero bits are
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shifted into the left (high-order) end.
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@ -213,14 +213,14 @@ SHR shifts the bits of the destination operand downward (toward
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destination = destination >> count
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```
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### HWI (Hardware Interrupt)
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### HWI
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#### Details
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| mnemonic | opcode | operands | carry | zero | sign | overflow | break |
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| -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
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| `HWI source` | `0x09` | `source` : `reg` / `mem` / `imm` | `-` | `-` | `-` | `-` | `-` |
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#### Description
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`HWI` triggers an [Hardware Interrupt](https://github.com/simon987/Much-Assembly-Required/wiki/Hardware). `source` should be the address of the harware device. This is differnt from the RAM memory addresses. See the documentation of the hardware devices to see what an `HWI` does for each device.
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`HWI` triggers a [Hardware Interrupt](https://github.com/simon987/Much-Assembly-Required/wiki/Hardware). `source` should be the address of the harware device. This is differnt from the RAM memory addresses. See the documentation of the hardware devices to see what an `HWI` does for each device.
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### JMP
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#### Details
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