From 79fa1e9f2dc27017cb9e5a09a57b757b0f96e325 Mon Sep 17 00:00:00 2001
From: Jordi Pakey-Rodriguez <0xdec@users.noreply.github.com>
Date: Tue, 2 Jan 2018 13:07:54 -0600
Subject: [PATCH] Fix links

---
 Instruction-Set.md | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/Instruction-Set.md b/Instruction-Set.md
index 36c84b8..3e98857 100644
--- a/Instruction-Set.md
+++ b/Instruction-Set.md
@@ -173,7 +173,7 @@ destination = destination & source
 destination = destination | source
 ```
 
-### SHL (Shift Logical Left)
+### SHL
 #### Details
 | mnemonic | opcode | operands | carry | zero | sign | overflow | break |
 | -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
@@ -181,7 +181,7 @@ destination = destination | source
 | | | `count` : `reg` / `mem` / `imm` |
 
 #### Description
-`SHL` shifts the bits of the destination operand upward (toward the
+`SHL` (Shift Logical Left) shifts the bits of the destination operand upward (toward the
     most significant bit) by the number of bit positions specified in
     the second operand (`count`). As bits are transferred out of the
     left (high-order) end of the destination, zero bits are shifted
@@ -194,7 +194,7 @@ The carry flag (CF) is set equal to the last bit shifted out of the left end.
 destination = destination << count
 ```
 
-### SHR (Shift Logical Right)
+### SHR
 #### Details
 | mnemonic | opcode | operands | carry | zero | sign | overflow | break |
 | -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
@@ -202,9 +202,9 @@ destination = destination << count
 | | | `count` : `reg` / `mem` / `imm` |
 
 #### Description
-SHR shifts the bits of the destination operand downward (toward
+`SHR` (Shift Logical Right) shifts the bits of the destination operand downward (toward
     the least significant bit) by the number of bit positions
-    specified in the second operand (count). As bits are transferred
+    specified in the second operand (`count`). As bits are transferred
     out of the right (low-order) end of the destination, zero bits are
     shifted into the left (high-order) end.
 
@@ -213,14 +213,14 @@ SHR shifts the bits of the destination operand downward (toward
 destination = destination >> count
 ```
 
-### HWI (Hardware Interrupt)
+### HWI
 #### Details
 | mnemonic | opcode | operands | carry | zero | sign | overflow | break |
 | -------- | ------ | -------- | ----- | ---- | ---- | -------- | ----- |
 | `HWI source`    | `0x09` |  `source` : `reg` / `mem` / `imm` |  `-`  |  `-` |  `-` |    `-`   |  `-`  |
 
 #### Description
-`HWI` triggers an [Hardware Interrupt](https://github.com/simon987/Much-Assembly-Required/wiki/Hardware). `source` should be the address of the harware device. This is differnt from the RAM memory addresses. See the documentation of the hardware devices to see what an `HWI` does for each device.
+`HWI` triggers a [Hardware Interrupt](https://github.com/simon987/Much-Assembly-Required/wiki/Hardware). `source` should be the address of the harware device. This is differnt from the RAM memory addresses. See the documentation of the hardware devices to see what an `HWI` does for each device.
 
 ### JMP
 #### Details