Table of Contents
Under Construction
Instructions are represented internally by either one, two, or three words. The basic instruction word combines a 6-bit opcode with two 5-bit source and destination selectors. Certain addressing modes/selectors require an additional word for either the source and/or destination after the basic instruction word.
Basic Instruction Word
The basic instruction word is required for every instruction encoding, it comes as the first word of an instruction. The word takes the following form:
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Use | S | S | S | S | S | D | D | D | D | D | O | O | O | O | O | O |
Where D represents the destination selector, S the source selector, and O the opcode number.
Selectors
Selectors are 5-bit values that determine the addressing mode and registers involved in an operand. Source and destination operand selectors share the same meaning and is fully orthogonal. The only invalid mode is IMMEDIATE16 since moving a value into a number doesn't make sense.
| Selector Type | Bit-pattern | Description |
|---|---|---|
| REGISTER_16 | 00000-01000 |
Value in register (0001 - 1000) |
| MEMORY_IMM16 | 11110 |
Address stored at operand word |
| MEMORY_REG16 | 01001 - 10000 |
Address stored in register (0001 - 1000) |
| MEMORY_REG_DISP16 | 10001 - 11000 |
Address stored in register (0001 - 1000) plus offset in operand word |
| IMMEDIATE16 | 11111 |
Immediate value at operand word |
Register Indexes
| Register | Number | Bit-pattern |
|---|---|---|
| A | 1 | 0001 |
| B | 2 | 0010 |
| C | 3 | 0011 |
| D | 4 | 0100 |
| X | 5 | 0101 |
| Y | 6 | 0110 |
| SP | 7 | 0111 |
| BP | 8 | 1000 |
Supplemental Words
If either the destination or source require a 16-bit immediate value as part of their addressing mode, then one or two additional word will be suffixed to the basic instruction word. If both a source and destination supplemental word are required, then the source word will come first in order.
| Word 0 | Word 1 | Word 2 |
|---|---|---|
| Basic Instruction | Source operand | Destination operand |
Abstract instructions
As there is a limited amount of opcodes some (abstract) instructions can have an encoding different from the regular format.
SETcc
The SETcc instruction family is implemented with the single opcode 0x32. It uses the Source operand word to encode its family opcode.
| instruction | family opcode |
|---|---|
| SETA | 0x01 |
| SETAE | 0x02 |
| SETBE | 0x03 |
| SETB | 0x04 |
| SETE | 0x05 |
| SETNE | 0x06 |
| SETG | 0x07 |
| SETGE | 0x08 |
| SETLE | 0x09 |
| SETL | 0x0A |
| SETO | 0x0B |
| SETNO | 0x0C |
| SETS | 0x0D |
| SETNS | 0x0E |