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+# Instruction set
+
+### Instruction table with affected flags
+| Instruction mnemonic | Operands | Opcode | `C Z S O B` |
+| -------------------- |:-------- |:------:|:--------- |
+| **ADD** *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x02 | `X X X X  -` |
+| **AND** *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x04 | `0 X X 0  -` |
+| **BRK** | *None* | 0x00 |`- - - - 1` |
+| **CALL** *target* | *mem/reg/imm* | 0x04 |`- - - - -` |
+| **CMP** *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x0C |`X X X X -` |
+| **DIV** *source* | *mem/reg/imm* |  0x18 |`- - - - -` |
+| **HWI** *source* | *mem/reg/imm* | 0x09 |`- - - - -` |
+| **HWQ** *source* | *mem/reg/imm* | 0x1C |`- - - - -` |
+| **JG** *target* | *mem/reg/imm* | 0x0F |`- - - - -` |
+| **JGE** *target* | *mem/reg/imm* | 0x10 |`- - - - -` |
+| **JL** *target* | *mem/reg/imm* |  0x11 |`- - - - -` |
+| **JLE** *target* | *mem/reg/imm* |  0x12 |`- - - - -` |
+| **JNS** *target* | *mem/reg/imm* | 0x1B |`- - - - -` |
+| **JNZ** *target* | *mem/reg/imm* | 0x0D |`- - - - -` |
+| **JZ** *target* | *mem/reg/imm* |  0x0E |`- - - - -` |
+| **MOV** *destination*, *source* | *mem/reg*, *mem/reg/imm* |0x01 |`- - - - -` |
+| **MUL** *source* | *mem/reg/imm* |  0x17 |`X - - X -` |
+| **NEG** *destination* | *mem/reg* |  0x19 |`1 X X X -`* |
+| **NOP**  | *None* |  0x3F |`- - - - -` |
+| **NOT** *destination* | *mem/reg* |  TODO |`- - - - -` |
+| **OR** *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x05 |`0 X X 0 -` |
+| **POP** *destination* | *mem/reg* | 0x14 |`- - - - -` |
+| **PUSH** *source* | *mem/reg/imm* | 0x13 |`- - - - -` |
+| **RET** *optional-pop-value* | *imm/None* |  0x16 |`- - - - -` |
+| **SHL** *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x06 |`X - - X -` |
+| **SHR** *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x07 |`X - - X -` |
+| **SUB** *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x03 |`X X X X -` |
+| **TEST** *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x0B |`0 X X 0 -` |
+| **XOR** *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x05 |`0 X X 0 -` |
+
+*NEG instruction: CF is set to 0 if destination=0
+
+### Instruction encoding
+WIP
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