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Updated Instruction Encoding (markdown)

DBJ314 2018-03-26 15:16:21 -04:00
parent 6608ea6263
commit 5889ebf320
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Instruction-Encoding.md

@ -25,14 +25,14 @@ Selectors are 5-bit values that determine the addressing mode and registers invo
### Register Indexes ### Register Indexes
| Register | Number | Bit-pattern | | Register | Number | Bit-pattern |
| --- | --- | --- | | --- | --- | --- |
| A | | | | A |1 |0001 |
| B | | | | B |2|0010 |
| C | | | | C |3 |0011 |
| D | | | | D |4 |0100 |
| X | | | | X |5 |0101 |
| Y | | | | Y |6 |0110 |
| SP | | | | SP |7 |0111 |
| BP | | | | BP |8 |1000 |
## Supplemental Words ## Supplemental Words
If either the destination or source require a 16-bit immediate value as part of their addressing mode, then one or two additional word will be suffixed to the basic instruction word. If both a source and destination supplemental word are required, then the source word will come first in order. If either the destination or source require a 16-bit immediate value as part of their addressing mode, then one or two additional word will be suffixed to the basic instruction word. If both a source and destination supplemental word are required, then the source word will come first in order.