diff --git a/Instruction-Set.md b/Instruction-Set.md
index 570c7e8..80140a9 100644
--- a/Instruction-Set.md
+++ b/Instruction-Set.md
@@ -3,46 +3,46 @@
 ### Instruction table with affected flags
 | Instruction mnemonic | Operands | Opcode | `C Z S O B` |
 | -------------------- |:-------- |:------:|:--------- |
-| [**ADD**](#ADD) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x02 | `X X X X  -` |
-| [**AND**](#AND) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x04 | `0 X X 0  -` |
-| [**BRK**](#BRK) | *None* | 0x00 |`- - - - 1` |
-| [**CALL**](#CALL) *target* | *mem/reg/imm* | 0x15 |`- - - - -` |
-| [**CMP**](#CMP) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x0C |`X X X X -` |
-| [**DIV**](#DIV) *source* | *mem/reg/imm* |  0x18 |`- - - - -` |
-| [**HWI**](#HWI) *source* | *mem/reg/imm* | 0x09 |`- - - - -` |
-| [**HWQ**](#HWQ) *source* | *mem/reg/imm* | 0x1C |`- - - - -` |
-| [**JC**](#JC) *target* | *mem/reg/imm* | 0x21 |`- - - - -` |
-| [**JG**](#JG) *target* | *mem/reg/imm* | 0x0F |`- - - - -` |
-| [**JGE**](#JGE) *target* | *mem/reg/imm* | 0x10 |`- - - - -` |
-| [**JL**](#JL) *target* | *mem/reg/imm* |  0x11 |`- - - - -` |
-| [**JLE**](#JLE) *target* | *mem/reg/imm* |  0x12 |`- - - - -` |
-| [**JMP**](#JMP) *target* | *mem/reg/imm* |  0x0A |`- - - - -` |
-| [**JNC**](#JNC) *target* | *mem/reg/imm* | 0x22 |`- - - - -` |
-| [**JNO**](#JNO) *target* | *mem/reg/imm* | 0x25 |`- - - - -` |
-| [**JNS**](#JNS) *target* | *mem/reg/imm* | 0x1B |`- - - - -` |
-| [**JNZ**](#JNZ) *target* | *mem/reg/imm* | 0x0D |`- - - - -` |
-| [**JO**](#JO) *target* | *mem/reg/imm* | 0x24 |`- - - - -` |
-| [**JS**](#JS) *target* | *mem/reg/imm* | 0x1A |`- - - - -` |
-| [**JZ**](#JZ) *target* | *mem/reg/imm* |  0x0E |`- - - - -` |
-| [**MOV**](#MOV) *destination*, *source* | *mem/reg*, *mem/reg/imm* |0x01 |`- - - - -` |
-| [**MUL**](#MUL) *source* | *mem/reg/imm* |  0x17 |`X - - X -` |
-| [**NEG**](#NEG) *destination* | *mem/reg* |  0x19 |`X X X X -`* |
-| [**NOP**](#NOP)  | *None* |  0x3F |`- - - - -` |
-| [**NOT**](#NOT) *destination* | *mem/reg* |  0x1D |`- - - - -` |
-| [**OR**](#OR) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x05 |`0 X X 0 -` |
-| [**POP**](#POP) *destination* | *mem/reg* | 0x14 |`- - - - -` |
-| [**PUSH**](#PUSH) *source* | *mem/reg/imm* | 0x13 |`- - - - -` |
-| [**RCL**](#RCL) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x27 |`X - - X -` |
-| [**RCR**](#RCR) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x28 |`X - - X -` |
-| [**RET**](#RET) *optional-pop-value* | *imm/None* |  0x16 |`- - - - -` |
-| [**ROL**](#ROL) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x23 |`X - - X -` |
-| [**ROR**](#ROR) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x20 |`X - - X -` |
-| [**SHL**](#SHL) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x06 |`X - - X -` |
-| [**SHR**](#SHR) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x07 |`X - - X -` |
-| [**SUB**](#SUB) *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x03 |`X X X X -` |
-| [**TEST**](#TEST) *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x0B |`0 X X 0 -` |
-| [**XCHG**](#XCHG) *destination*, *source* | *mem/reg*, *mem/reg* | 0x1F |`- - - - -` |
-| [**XOR**](#XOR) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x26 |`0 X X 0 -` |
+| [**ADD**](#add) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x02 | `X X X X  -` |
+| [**AND**](#and) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x04 | `0 X X 0  -` |
+| [**BRK**](#brk) | *None* | 0x00 |`- - - - 1` |
+| [**CALL**](#call) *target* | *mem/reg/imm* | 0x15 |`- - - - -` |
+| [**CMP**](#cmp) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x0C |`X X X X -` |
+| [**DIV**](#div) *source* | *mem/reg/imm* |  0x18 |`- - - - -` |
+| [**HWI**](#hwi) *source* | *mem/reg/imm* | 0x09 |`- - - - -` |
+| [**HWQ**](#hwq) *source* | *mem/reg/imm* | 0x1C |`- - - - -` |
+| [**JC**](#jc) *target* | *mem/reg/imm* | 0x21 |`- - - - -` |
+| [**JG**](#jg) *target* | *mem/reg/imm* | 0x0F |`- - - - -` |
+| [**JGE**](#jge) *target* | *mem/reg/imm* | 0x10 |`- - - - -` |
+| [**JL**](#jl) *target* | *mem/reg/imm* |  0x11 |`- - - - -` |
+| [**JLE**](#jle) *target* | *mem/reg/imm* |  0x12 |`- - - - -` |
+| [**JMP**](#jmp) *target* | *mem/reg/imm* |  0x0A |`- - - - -` |
+| [**JNC**](#jnc) *target* | *mem/reg/imm* | 0x22 |`- - - - -` |
+| [**JNO**](#jno) *target* | *mem/reg/imm* | 0x25 |`- - - - -` |
+| [**JNS**](#jns) *target* | *mem/reg/imm* | 0x1B |`- - - - -` |
+| [**JNZ**](#jnz) *target* | *mem/reg/imm* | 0x0D |`- - - - -` |
+| [**JO**](#jo) *target* | *mem/reg/imm* | 0x24 |`- - - - -` |
+| [**JS**](#js) *target* | *mem/reg/imm* | 0x1A |`- - - - -` |
+| [**JZ**](#jz) *target* | *mem/reg/imm* |  0x0E |`- - - - -` |
+| [**MOV**](#mov) *destination*, *source* | *mem/reg*, *mem/reg/imm* |0x01 |`- - - - -` |
+| [**MUL**](#mul) *source* | *mem/reg/imm* |  0x17 |`X - - X -` |
+| [**NEG**](#neg) *destination* | *mem/reg* |  0x19 |`X X X X -`* |
+| [**NOP**](#nop)  | *None* |  0x3F |`- - - - -` |
+| [**NOT**](#not) *destination* | *mem/reg* |  0x1D |`- - - - -` |
+| [**OR**](#or) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x05 |`0 X X 0 -` |
+| [**POP**](#pop) *destination* | *mem/reg* | 0x14 |`- - - - -` |
+| [**PUSH**](#push) *source* | *mem/reg/imm* | 0x13 |`- - - - -` |
+| [**RCL**](#rcl) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x27 |`X - - X -` |
+| [**RCR**](#rcr) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x28 |`X - - X -` |
+| [**RET**](#ret) *optional-pop-value* | *imm/None* |  0x16 |`- - - - -` |
+| [**ROL**](#rol) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x23 |`X - - X -` |
+| [**ROR**](#ror) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x20 |`X - - X -` |
+| [**SHL**](#shl) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x06 |`X - - X -` |
+| [**SHR**](#shr) *destination*, *count* | *mem/reg*, *mem/reg/imm* | 0x07 |`X - - X -` |
+| [**SUB**](#sub) *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x03 |`X X X X -` |
+| [**TEST**](#test) *destination*, *source* | *mem/reg*, *mem/reg/imm* |  0x0B |`0 X X 0 -` |
+| [**XCHG**](#cxhg) *destination*, *source* | *mem/reg*, *mem/reg* | 0x1F |`- - - - -` |
+| [**XOR**](#xor) *destination*, *source* | *mem/reg*, *mem/reg/imm* | 0x26 |`0 X X 0 -` |
 
 ### Instruction encoding
 Instructions are 1-3 words long and are fully defined by the first word.