diff --git a/Instruction-Encoding.md b/Instruction-Encoding.md new file mode 100644 index 0000000..9e5a031 --- /dev/null +++ b/Instruction-Encoding.md @@ -0,0 +1,23 @@ +**Under Construction** + +Instructions are represented internally by either one, two, or three words. The basic instruction word combines a 6-bit opcode with two 5-bit source and destination selectors. Certain addressing modes/selectors require an additional word for either the source or destination after the basic instruction word. + +## Basic Instruction Word +The basic instruction word is required for every instruction encoding, it comes as the first word of an instruction. The word takes the following form: + +| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +| --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | +| **Use** | D | D | D | D | D | S | S | S | S | S | O | O | O | O | O | O | + +Where **D** represents the destination selector, **S** the source selector, and **O** the opcode number. + +### Selectors +Selectors are 5-bit values that determine the addressing mode and registers involved in an operand. Source and destination operand selectors share the same meaning and is fully orthogonal. The only invalid mode is IMMEDIATE16 since moving a value into a number doesn't make sense. + +| Selector Type | Bit-pattern | Description | +| --- | --- | --- | +| REGISTER_16 | | | +| MEMORY_IMM16 | `11110` | | +| MEMORY_REG16 | | | +| MEMORY_REG_DISP16 | | | +| IMMEDIATE16 | `11111` | | \ No newline at end of file