move up the instruction encoding part

Kevin Ramharak 2020-07-29 22:18:21 +02:00
parent 782043bee7
commit 33011133b4

@ -121,6 +121,25 @@ MOV A, 0x20
This human readable format is parsed by the assembler which will output the actual binary opcodes and operands.
### Instruction encoding
Instructions are 1-3 words long and are fully defined by the first word.
In a basic instruction, the lower 6 bits of the first word of the instruction
are the opcode, and the remaining 10 bits are split into a 5 bit destination operand
and a 5 bit source operand.
In bits, a basic instruction has the format: `sssssdddddoooooo`
Operand value:
| Description | Value |
| --- | --- |
| Invalid or none | `00000` |
| Immediate value at IP+1 | `11111` |
| [Immediate value at IP+1] | `11110` |
| Register | `00001`-`01000` |
| [Register] | `01001`-`10000` |
| Register + Immediate value at IP+1 | `10001`-`11000` |
## Flags
Some instructions will change certain flags based on their result. These are in a special non read-write register. These flags are used for the family of jump instructions. You can also use the [`PUSHF`](#pushf) and [`POPF`](#popf) instructions to query and manipulate the flags
@ -1051,22 +1070,4 @@ XOR performs a bit-by-bit "exclusive or" on its two operands, and
#### Pseudo code
```py
destination = destination ^ source
```
### Instruction encoding
Instructions are 1-3 words long and are fully defined by the first word.
In a basic instruction, the lower 6 bits of the first word of the instruction
are the opcode, and the remaining 10 bits are split into a 5 bit destination operand
and a 5 bit source operand.
In bits, a basic instruction has the format: `sssssdddddoooooo`
Operand value:
| Description | Value |
| --- | --- |
| Invalid or none | `00000` |
| Immediate value at IP+1 | `11111` |
| [Immediate value at IP+1] | `11110` |
| Register | `00001`-`01000` |
| [Register] | `01001`-`10000` |
| Register + Immediate value at IP+1 | `10001`-`11000` |
```