Fixed some whitespace nonsense from a merge.

This commit is contained in:
Brent O'Neil 2017-12-30 03:07:28 +11:00
parent fedd4bb779
commit ff4a3d6f20
4 changed files with 35 additions and 40 deletions

View File

@ -473,9 +473,9 @@ public class CPU implements JSONSerialisable {
*
*/
public void Interrupt(int hw, int offset, boolean retry) {
Instruction push = instructionSet.get("push");
push.execute(status.toByte(), status);
Instruction push = instructionSet.get("push");
push.execute(status.toByte(), status);
push.execute(ip, status);
this.setIp((char)(0x0200 + offset*2 + 0x0080*hw));
this.setIp((char)(0x0200 + offset*2 + 0x0080*hw));
}
}

View File

@ -134,18 +134,18 @@ public class Status {
}
public char toByte() {
char stat = 0;
stat = (char) (stat | ((signFlag ? 1 : 0) << 3));
stat = (char) (stat | ((zeroFlag ? 1 : 0) << 2));
stat = (char) (stat | ((carryFlag ? 1 : 0) << 1));
stat = (char) (stat | (overflowFlag ? 1 : 0));
return stat;
char stat = 0;
stat = (char) (stat | ((signFlag ? 1 : 0) << 3));
stat = (char) (stat | ((zeroFlag ? 1 : 0) << 2));
stat = (char) (stat | ((carryFlag ? 1 : 0) << 1));
stat = (char) (stat | (overflowFlag ? 1 : 0));
return stat;
}
public void fromByte(char stat) {
setSignFlag((stat & (1 << 3)) != 0);
setZeroFlag((stat & (1 << 2)) != 0);
setCarryFlag((stat & (1 << 1)) != 0);
setOverflowFlag((stat & 1) != 0);
setSignFlag((stat & (1 << 3)) != 0);
setZeroFlag((stat & (1 << 2)) != 0);
setCarryFlag((stat & (1 << 1)) != 0);
setOverflowFlag((stat & 1) != 0);
}
}

View File

@ -11,25 +11,22 @@ import net.simon987.server.assembly.Status;
*/
public class IntInstruction extends Instruction{
public static final int OPCODE = 48;
private CPU cpu;
public static final int OPCODE = 48;
private CPU cpu;
public IntInstruction(CPU cpu) {
super("int", OPCODE);
this.cpu = cpu;
}
public IntInstruction(CPU cpu) {
super("int", OPCODE);
this.cpu = cpu;
}
@Override
@Override
public Status execute(int src, Status status) {
cpu.Interrupt(0, src, false);
cpu.Interrupt(0, src, false);
return status;
}
public Status execute(Status status) {
cpu.Interrupt(0,0, false);
cpu.Interrupt(0,0, false);
return status;
}
}
}

View File

@ -6,21 +6,19 @@ import net.simon987.server.assembly.Status;
public class IntrInstruction extends Instruction{
public static final int OPCODE = 49;
private CPU cpu;
public static final int OPCODE = 49;
private CPU cpu;
public IntrInstruction(CPU cpu) {
super("intr", OPCODE);
this.cpu = cpu;
}
public IntrInstruction(CPU cpu) {
super("intr", OPCODE);
this.cpu = cpu;
}
public Status execute(Status status) {
cpu.setIp((char)cpu.getMemory().get(cpu.getRegisterSet().getRegister("SP").getValue()));
status.fromByte((char) cpu.getMemory().get(cpu.getRegisterSet().getRegister("SP").getValue() + 1));
cpu.getRegisterSet().getRegister("SP").setValue(cpu.getRegisterSet().getRegister("SP").getValue() + 2); //Increment SP (stack grows towards smaller)
return status;
}
public Status execute(Status status) {
cpu.setIp((char)cpu.getMemory().get(cpu.getRegisterSet().getRegister("SP").getValue()));
status.fromByte((char) cpu.getMemory().get(cpu.getRegisterSet().getRegister("SP").getValue() + 1));
cpu.getRegisterSet().getRegister("SP").setValue(cpu.getRegisterSet().getRegister("SP").getValue() + 2); //Increment SP (stack grows towards smaller)
return status;
}
}