Added RCR/RCL Instructions #7.

This commit is contained in:
simon 2017-11-13 20:08:07 -05:00
parent 9979986c6a
commit 42421b7710
3 changed files with 141 additions and 2 deletions

View File

@ -0,0 +1,70 @@
package net.simon987.server.assembly.instruction;
import net.simon987.server.assembly.Instruction;
import net.simon987.server.assembly.Status;
import net.simon987.server.assembly.Target;
/**
* +---------------------+
* | |
* CF < 0<0<0<0<0<0<0<0 <-+
*/
public class RclInstruction extends Instruction {
private static final int OPCODE = 39;
public RclInstruction() {
super("rcl", OPCODE);
}
@Override
public Status execute(Target dst, int dstIndex, Target src, int srcIndex, Status status) {
int count = src.get(srcIndex) % 17;
int destination = dst.get(dstIndex);
int signBit = (destination & 0x8000);
if (status.isCarryFlag()) {
destination |= 0x10000;
}
destination = (destination << count) | (destination >>> (17 - count));
status.setCarryFlag((destination & 0x10000) == 0x10000);
if (count == 1) {
status.setOverflowFlag((destination & 0x8000) != signBit); //Set OF if sign bit changed
}
dst.set(dstIndex, destination & 0xFFFF);
return status;
}
@Override
public Status execute(Target dst, int dstIndex, int src, Status status) {
int count = src % 17;
int destination = dst.get(dstIndex);
int signBit = (destination & 0x8000);
if (status.isCarryFlag()) {
destination |= 0x10000;
}
destination = (destination << count) | (destination >>> (17 - count));
status.setCarryFlag((destination & 0x10000) == 0x10000);
if (count == 1) {
status.setOverflowFlag((destination & 0x8000) != signBit); //Set OF if sign bit changed
}
dst.set(dstIndex, destination & 0xFFFF);
return status;
}
}

View File

@ -0,0 +1,69 @@
package net.simon987.server.assembly.instruction;
import net.simon987.server.assembly.Instruction;
import net.simon987.server.assembly.Status;
import net.simon987.server.assembly.Target;
/**
* +---------------------+
* | |
* CF < 0<0<0<0<0<0<0<0 <-+
*/
public class RcrInstruction extends Instruction {
private static final int OPCODE = 40;
public RcrInstruction() {
super("rcr", OPCODE);
}
@Override
public Status execute(Target dst, int dstIndex, Target src, int srcIndex, Status status) {
int count = src.get(srcIndex) % 17;
int destination = dst.get(dstIndex) << 1;
int signBit = (destination & 0x10000);
if (status.isCarryFlag()) {
destination |= 1;
}
destination = (destination >>> count) | (destination << (17 - count));
status.setCarryFlag((destination & 1) == 1);
if (count == 1) {
status.setOverflowFlag((destination & 0x10000) != signBit); //Set OF if sign bit changed
}
dst.set(dstIndex, destination >> 1);
return status;
}
@Override
public Status execute(Target dst, int dstIndex, int src, Status status) {
int count = src % 17;
int destination = dst.get(dstIndex) << 1;
int signBit = (destination & 0x10000);
if (status.isCarryFlag()) {
destination |= 1;
}
destination = (destination >>> count) | (destination << (17 - count));
status.setCarryFlag((destination & 1) == 1);
if (count == 1) {
status.setOverflowFlag((destination & 0x10000) != signBit); //Set OF if sign bit changed
}
dst.set(dstIndex, destination >> 1);
return status;
}
}

View File

@ -5,8 +5,8 @@ import net.simon987.server.assembly.Status;
import net.simon987.server.assembly.Target;
/**
* +-----------------+
* | |
* +-----------------+
* | |
* CF < 0<0<0<0<0<0<0<0 <-+
*/
public class RolInstruction extends Instruction {